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Microchip Technology /ATSAME51J18A /SDHC0 /NISIER_EMMC_MODE

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Interpret as NISIER_EMMC_MODE

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15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (MASKED)CMDC 0 (MASKED)TRFC 0 (MASKED)BLKGE 0 (MASKED)DMAINT 0 (MASKED)BWRRDY 0 (MASKED)BRDRDY 0 (BOOTAR)BOOTAR

BRDRDY=MASKED, BLKGE=MASKED, TRFC=MASKED, BWRRDY=MASKED, DMAINT=MASKED, CMDC=MASKED

Description

Normal Interrupt Signal Enable

Fields

CMDC

Command Complete Signal Enable

0 (MASKED): Masked

1 (ENABLED): Enabled
TRFC

Transfer Complete Signal Enable

0 (MASKED): Masked

1 (ENABLED): Enabled
BLKGE

Block Gap Event Signal Enable

0 (MASKED): Masked

1 (ENABLED): Enabled
DMAINT

DMA Interrupt Signal Enable

0 (MASKED): Masked

1 (ENABLED): Enabled
BWRRDY

Buffer Write Ready Signal Enable

0 (MASKED): Masked

1 (ENABLED): Enabled
BRDRDY

Buffer Read Ready Signal Enable

0 (MASKED): Masked

1 (ENABLED): Enabled
BOOTAR

Boot Acknowledge Received Signal Enable

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data